1. Field of the Invention
The present invention relates to a magnetic memory device and a method of manufacture thereof and more specifically to a magnetic memory device having magnetic circuits and a method of manufacture thereof.
2. Description of the Related Art
Recently, a magnetic memory device utilizing magnetic properties is known. The magnetic memory device stores information utilizing the tunneling magnetoresistance (hereinafter abbreviated as TMR) effect.
As such a magnetic memory device, there is a so-called magnetic random access memory (hereinafter abbreviated as MRAM). The MRAM, which is a generic term for solid memories that utilize the direction of magnetization of ferromagnetic material as information record carrier, can rewrite, hold, or read recorded information as required.
FIGS. 40A and 40B are schematic plan and sectional views, respectively, of a typical magnetic memory device. As shown, a memory cell 203 is placed at each of intersections of first and second write wirings 201 and 202 and between them. The memory cell 203 is formed of a pinned (fixed) layer, a tunnel barrier layer, and a recording layer, which are stacked in the order mentioned.
In writing information into a selected memory cell 203, current is caused to flow in each of the write wiring 201 and 202 associated with that selected memory. As a result, magnetic fields are generated at the intersection of the write wiring 201 and 202 to reverse the direction of magnetization of the recording layer of the memory cell 203. Depending on whether the relative direction of the magnetization of the pinned layer and the recording layer is parallel or antiparallel, binary information is recorded.
Reading of recorded information is effected utilizing the magnetoresistance effect. The magnetoresistance effect is a phenomenon by which the electrical resistance of the memory cell 203 changes with the relative angle between the direction of magnetization of the ferromagnetic material forming the memory cell and current. A change in the resistance is read by flowing current in the memory cell 203.
To write information, it is required to generate a magnetic field (switching magnetic field) needed to reverse the direction of magnetization of the recording layer. Known is providing a keeper layer or yoke structure (magnetic circuit) around the write wirings 201 and 202 in order to generate efficiently that magnetic field with a small amount of current (see U.S. Pat. No. 5,940,319, U.S. Pat. No. 5,956,267, European Patent No. WO 00/10172, and Japanese Unexamined Patent Publication No. 8-306014).
As shown in FIGS. 41A and 41B, around the first write wiring 201 is provided a magnetic circuit 205 made of a magnetic material of high permeability with a barrier metal 204 interposed therebetween. Such a structure allows magnetic flux generated around the write wiring 201 to be converged on the magnetic circuit 205 efficiently. Thus, the current value (write current value) required to generate the switching magnetic field can be reduced. When the magnetic circuit 205 is provided, the intensity of the magnetic field generated in the vicinity of the memory cell 203 depends on the distance between the magnetic circuit and the memory cell. That is, the shorter the distance, the greater the magnetic field generated in the vicinity of the memory cell 203.
As design rules scale down and hence the packing density of magnetic memory devices increases, the difficulties involved in the lithographic process increase. For this reason, variations in the size of memory cells may occur as shown in FIG. 42A. Also, there is a limit to the overlay accuracy; thus, for example, the memory cells 203 may not be aligned with the write wiring 201 as shown in FIG. 43A. The variations in memory cell size and the misalignment of the memory cells 203 with the write wiring 201 result in the following problems:
As shown in FIGS. 42B and 42C which are sectional views taken along lines XLIIB—XLIIB and XLIIC—XLIIC in FIG. 42A, a large memory cell 203b is smaller in the distance to the magnetic circuit 205 than a small memory cell 203a. For this reason, most of magnetic flux 206 generated around the write wiring 201 will converge on the memory cell 203b. On the other hand, the magnetic field in the memory cell 203a becomes small.
As shown in FIGS. 43B and 43C as well, which are sectional views taken along lines XLIIIB—XLIIIB and XLIIIC—XLIIIC in FIG. 43A, the magnetic flux varies between a memory cell 203c and a memory cell 203d. 
Thus, the presence of variations in the size of memory cells and displacements of the memory cells cause the applied magnetic flux to vary from cell to cell. This will cause the write current value to vary from cell to cell, resulting in lowered yield of magnetic memory devices.